搜索资源列表
verilog-digital-filter
- 本文主要介绍了数字滤波器,基于Verilog语言的硬件实现。-digital filter Verilog code
verilog-fir
- 基于verilog的三种不同方式的fir滤波器 fir1:直接型 fir2:串行DA fir3:并行DA-Fir filter for the verilog three different ways fir1: direct type fir2 of: serial of DA fir3: parallel DA
CIC_fir-Verilog
- 本程序是一个CIC滤波器设计,有助于初学者对滤波器设计设计有一个初步的了解-CIC fir
verilog
- 最长的那个句子,求sum的赋值语句就是FIR滤波器的计算过程,将二进制乘法转化为移位运算。对于小数点后的乘数是向左移,小数点前的乘数是往右移位。 -The longest sentence, find the sum of the assignment statement is the calculation of the FIR filter, the binary multiplication into shift operation. Multiplier after the deci
matlab-and-verilog-fir4_3
- 四抽头FIR滤波器matlab,verilog顶层,子模块,以及testbench代码-Four tap FIR filter matlab, verilog top, sub modules, as well as the testbench code
verilog
- 数字信号处理的FPGA实现 第三版 verliog 从简单的加法器 到 现代滤波器-FPGA implementation of digital signal processing third edition verliog from simple adder to modern filter
fir
- 基于verilog的 FIR低通滤波器的实现(Implementation of FIR low pass filter based on Verilog)
prj_ex_13
- 用verilog实现数字滤波器的功能,基于quatursii平台。内含源代码(With Verilog digital filter function, based on the quatursii platform. Contain source code)
farrow
- verilog语言编写的farrow滤波器的实现过程,供大家参考,谢谢。(Verilog language Farrow filter implementation process for your reference)
DDS_display
- 自己写的FIR八戒低通滤波器,仅供参考(Write your own FIR eight quit low-pass filter, for reference only)
DDC中的抽取滤波器设计及FPGA实现
- 本文对下变频模块中抽取滤波进行了详细的分析,并详细阐述了其FPGA的实现过程和方法(In this paper, the decimation filtering in the down conversion module is analyzed in detail, and the realization process and method of FPGA are discussed in detail)
IIR滤波器的FPGA设计
- 基于verilog hdl语言对IIR滤波器设计(Design of IIR filter based on Verilog HDL language)
CIC_Filter_Module
- 数字接收机cic抽取模块 抽取倍数可以选择 包括verilog代码 word文档 matlab仿真 testbench代码(CIC decimation module of digital receiver Extraction multiple can be selected Including Verilog code Word document Matlab simulation Testbench code)
FIR_filter_stereotype
- 第二类有限冲击响应滤波器60阶常系数verilog(The second type of finite impulse response filter, 60 order,coefficient verilog)
d974d4330bf7
- 这是一个非常完整的qpsk调制解调用fpga实现的工程,在工程中已经能够正常使用,使用的quartus ii 开发,使用Verilog语言,文件中还包含了各种滤波器的系数文件,还有matlab仿真文件,整个工程包含从串并变换,相位映射,到成型滤波,中通滤波,cic滤波,调制,再到解调过成的下变频,匹配滤波,载波提取,位定时,判决,整个完整的过程(This is a very complete QPSK modulation and demodulation using FPGA implemen
FIR
- fir滤波器的简单实现,主要用于学习与理解(Simple implementation of the fir filter, mainly for learning and understanding)
iir_2n_ip_float_demo
- 使用altera提供的ip核,实现了浮点数运算的2阶iir滤波器,结果与matlab运算结果相同。(Using the IP core provided by Altera, the 2 order IIR filter of floating point operation is implemented, and the result is the same as that of MATLAB operation.)
CICFilter
- 一个CIC滤波器的源代码,基于verilog HDL语言(The source code of a CIC filter is based on Verilog HDL language.)
fir_lms
- 通过基于LMS算法的Verilog程序的编写来实现自适应滤波器的功能(The function of adaptive filter is realized by compiling Verilog program based on LMS algorithm.)
好-无线通信FPGA设计-Xilinx
- 《无线通信FPGA设计》以Xilinx公司的FPGA开发平台为基础,综合FPGA和无线通信技术两个方向,通过大量的FPGA开发实例,较为详尽地描述了无线通信中常用模块的原理和实现流程,包括数字信号处理基础、数字滤波器、多速率信号处理、数字调制与解调、信道编码、系统同步、自适应滤波算法、最佳接收机,以及WCDMA系统的关键技术。《无线通信FPGA设计》概念明确、思路清晰,追求全面、系统、实用,使读者能够在较短的时间内具备无线通信领域的FPGA开发能力。(The design of wireless